 |
libElysianVMU 1.6.0
Full-featured, accurate, cross-platform library emulating the Dreamcast's Visual Memory Unit
|
|
libElysianVMU 1.6.0
Full-featured, accurate, cross-platform library emulating the Dreamcast's Visual Memory Unit
|
Go to the source code of this file.
Defines and documentation for all known SFR fields.
Definition in file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT0_CYCLE_CTRL_MASK 0x80 |
Definition at line 273 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT0_CYCLE_CTRL_POS 7 |
Definition at line 272 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT0_REQ_EN_MASK 0x1 |
Definition at line 285 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT0_REQ_EN_POS 0k |
Definition at line 284 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT0_SRC_MASK 0x2 |
Definition at line 283 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT0_SRC_POS 1 |
Definition at line 282 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT1_CYCLE_CTRL_MASK 0x30 |
Definition at line 277 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT1_CYCLE_CTRL_POS 4 |
Definition at line 276 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT1_REQ_EN_MASK 0x4 |
Definition at line 281 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT1_REQ_EN_POS 2 |
Definition at line 280 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT1_SRC_MASK 0x8 |
Definition at line 279 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_INT1_SRC_POS 3 |
Definition at line 278 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_OP_CTRL_MASK 0x40 |
Definition at line 275 of file evmu_sfr.h.
| #define EVMU_SFR_BTCR_OP_CTRL_POS 6 |
Definition at line 274 of file evmu_sfr.h.
| #define EVMU_SFR_EXT_FLASH_BANK_0 0x01 |
Definition at line 85 of file evmu_sfr.h.
| #define EVMU_SFR_EXT_FLASH_BANK_1 0x00 |
Definition at line 86 of file evmu_sfr.h.
| #define EVMU_SFR_EXT_ROM 0x08 |
Definition at line 84 of file evmu_sfr.h.
| #define EVMU_SFR_FPR_ADDR_MASK 0x1 |
Definition at line 250 of file evmu_sfr.h.
| #define EVMU_SFR_FPR_ADDR_POS 0 |
Definition at line 251 of file evmu_sfr.h.
| #define EVMU_SFR_FPR_UNLOCK_MASK 0x2 |
Definition at line 248 of file evmu_sfr.h.
| #define EVMU_SFR_FPR_UNLOCK_POS 1 |
Definition at line 249 of file evmu_sfr.h.
| #define EVMU_SFR_IE_IE0_MASK 0x1 |
Definition at line 43 of file evmu_sfr.h.
| #define EVMU_SFR_IE_IE0_POS 1 |
Definition at line 42 of file evmu_sfr.h.
| #define EVMU_SFR_IE_IE1_MASK 0x2 |
Definition at line 41 of file evmu_sfr.h.
| #define EVMU_SFR_IE_IE1_POS 2 |
Definition at line 40 of file evmu_sfr.h.
| #define EVMU_SFR_IE_IE7_MASK 0x80 |
Definition at line 39 of file evmu_sfr.h.
| #define EVMU_SFR_IE_IE7_POS 7 |
Definition at line 38 of file evmu_sfr.h.
| #define EVMU_SFR_IP_INT2_MASK 0x1 |
Definition at line 61 of file evmu_sfr.h.
| #define EVMU_SFR_IP_INT2_POS 0 |
Definition at line 60 of file evmu_sfr.h.
| #define EVMU_SFR_IP_INT3_MASK 0x2 |
Definition at line 59 of file evmu_sfr.h.
| #define EVMU_SFR_IP_INT3_POS 1 |
Definition at line 58 of file evmu_sfr.h.
| #define EVMU_SFR_IP_P3_MASK 0x80 |
Definition at line 47 of file evmu_sfr.h.
| #define EVMU_SFR_IP_P3_POS 7 |
Definition at line 46 of file evmu_sfr.h.
| #define EVMU_SFR_IP_RBF_MASK 0x40 |
Definition at line 49 of file evmu_sfr.h.
| #define EVMU_SFR_IP_RBF_POS 6 |
Definition at line 48 of file evmu_sfr.h.
| #define EVMU_SFR_IP_SIO0_MASK 0x10 |
Definition at line 53 of file evmu_sfr.h.
| #define EVMU_SFR_IP_SIO0_POS 4 |
Definition at line 52 of file evmu_sfr.h.
| #define EVMU_SFR_IP_SIO1_MASK 0x20 |
Definition at line 51 of file evmu_sfr.h.
| #define EVMU_SFR_IP_SIO1_POS 5 |
Definition at line 50 of file evmu_sfr.h.
| #define EVMU_SFR_IP_T0H_MASK 0x4 |
Definition at line 57 of file evmu_sfr.h.
| #define EVMU_SFR_IP_T0H_POS 2 |
Definition at line 56 of file evmu_sfr.h.
| #define EVMU_SFR_IP_T1_MASK 0x8 |
Definition at line 55 of file evmu_sfr.h.
| #define EVMU_SFR_IP_T1_POS 3 |
Definition at line 54 of file evmu_sfr.h.
| #define EVMU_SFR_MCR_MCR0_MASK 0x1 |
Definition at line 131 of file evmu_sfr.h.
| #define EVMU_SFR_MCR_MCR0_POS 0 |
Definition at line 130 of file evmu_sfr.h.
| #define EVMU_SFR_MCR_MCR3_MASK 0x8 |
Definition at line 129 of file evmu_sfr.h.
| #define EVMU_SFR_MCR_MCR3_POS 3 |
Definition at line 128 of file evmu_sfr.h.
| #define EVMU_SFR_MCR_MCR4_MASK 0x10 |
Definition at line 127 of file evmu_sfr.h.
| #define EVMU_SFR_MCR_MCR4_POS 4 |
Definition at line 126 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR0_MASK 0x1 |
Definition at line 105 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR0_POS 0 |
Definition at line 104 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR1_MASK 0x2 |
Definition at line 103 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR1_POS 1 |
Definition at line 102 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR4_MASK 0x10 |
Definition at line 101 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR4_POS 4 |
Definition at line 100 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR5_MASK 0x20 |
Definition at line 99 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR5_POS 5 |
Definition at line 98 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR7_MASK 0x80 |
Definition at line 97 of file evmu_sfr.h.
| #define EVMU_SFR_OCR_OCR7_POS 7 |
Definition at line 96 of file evmu_sfr.h.
| #define EVMU_SFR_P1_P17_MASK 0x80 |
Definition at line 171 of file evmu_sfr.h.
| #define EVMU_SFR_P1_P17_POS 7 |
Definition at line 170 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN10_MASK 0x10 |
Definition at line 175 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN10_POS 4 |
Definition at line 174 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN11_MASK 0x8 |
Definition at line 177 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN11_POS 3 |
Definition at line 176 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN12_MASK 0x20 |
Definition at line 173 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN12_POS 5 |
Definition at line 172 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN3_MASK 0x4 |
Definition at line 179 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN3_POS 2 |
Definition at line 178 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN4_MASK 0x2 |
Definition at line 181 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN4_POS 1 |
Definition at line 180 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN5_MASK 0x1 |
Definition at line 183 of file evmu_sfr.h.
| #define EVMU_SFR_P1_PIN5_POS 0 |
Definition at line 182 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P10DDR_MASK 0x1 |
Definition at line 201 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P10DDR_POS 0 |
Definition at line 200 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P11DDR_MASK 0x2 |
Definition at line 199 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P11DDR_POS 1 |
Definition at line 198 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P12DDR_MASK 0x4 |
Definition at line 197 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P12DDR_POS 2 |
Definition at line 196 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P13DDR_MASK 0x8 |
Definition at line 195 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P13DDR_POS 3 |
Definition at line 194 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P14DDR_MASK 0x10 |
Definition at line 193 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P14DDR_POS 4 |
Definition at line 192 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P15DDR_MASK 0x20 |
Definition at line 191 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P15DDR_POS 5 |
Definition at line 190 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P16DDR_MASK 0x40 |
Definition at line 189 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P16DDR_POS 6 |
Definition at line 188 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P17DDR_MASK 0x80 |
Definition at line 187 of file evmu_sfr.h.
| #define EVMU_SFR_P1DDR_P17DDR_POS 7 |
Definition at line 186 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P10FCR_MASK 0x1 |
Definition at line 219 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P10FCR_POS 0 |
Definition at line 218 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P11FCR_MASK 0x2 |
Definition at line 217 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P11FCR_POS 1 |
Definition at line 216 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P12FCR_MASK 0x4 |
Definition at line 215 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P12FCR_POS 2 |
Definition at line 214 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P13FCR_MASK 0x8 |
Definition at line 213 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P13FCR_POS 3 |
Definition at line 212 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P14FCR_MASK 0x10 |
Definition at line 211 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P14FCR_POS 4 |
Definition at line 210 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P15FCR_MASK 0x20 |
Definition at line 209 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P15FCR_POS 5 |
Definition at line 208 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P16FCR_MASK 0x40 |
Definition at line 207 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P16FCR_POS 6 |
Definition at line 206 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P17FCR_MASK 0x80 |
Definition at line 205 of file evmu_sfr.h.
| #define EVMU_SFR_P1FCR_P17FCR_POS 7 |
Definition at line 204 of file evmu_sfr.h.
| #define EVMU_SFR_P3_A_MASK 0x10 |
Definition at line 229 of file evmu_sfr.h.
| #define EVMU_SFR_P3_A_POS 4 |
Definition at line 228 of file evmu_sfr.h.
| #define EVMU_SFR_P3_B_MASK 0x20 |
Definition at line 227 of file evmu_sfr.h.
| #define EVMU_SFR_P3_B_POS 5 |
Definition at line 226 of file evmu_sfr.h.
| #define EVMU_SFR_P3_DOWN_MASK 0x2 |
Definition at line 235 of file evmu_sfr.h.
| #define EVMU_SFR_P3_DOWN_POS 1 |
Definition at line 234 of file evmu_sfr.h.
| #define EVMU_SFR_P3_LEFT_MASK 0x4 |
Definition at line 233 of file evmu_sfr.h.
| #define EVMU_SFR_P3_LEFT_POS 2 |
Definition at line 232 of file evmu_sfr.h.
| #define EVMU_SFR_P3_MODE_MASK 0x40 |
Definition at line 225 of file evmu_sfr.h.
| #define EVMU_SFR_P3_MODE_POS 6 |
Definition at line 224 of file evmu_sfr.h.
| #define EVMU_SFR_P3_RIGHT_MASK 0x8 |
Definition at line 231 of file evmu_sfr.h.
| #define EVMU_SFR_P3_RIGHT_POS 3 |
Definition at line 230 of file evmu_sfr.h.
| #define EVMU_SFR_P3_SLEEP_MASK 0x80 |
Definition at line 223 of file evmu_sfr.h.
| #define EVMU_SFR_P3_SLEEP_POS 7 |
Definition at line 222 of file evmu_sfr.h.
| #define EVMU_SFR_P3_UP_MASK 0x1 |
Definition at line 237 of file evmu_sfr.h.
| #define EVMU_SFR_P3_UP_POS 0 |
Definition at line 236 of file evmu_sfr.h.
| #define EVMU_SFR_P3INT_P30INT_MASK 0x1 |
Definition at line 245 of file evmu_sfr.h.
| #define EVMU_SFR_P3INT_P30INT_POS 0 |
Definition at line 244 of file evmu_sfr.h.
| #define EVMU_SFR_P3INT_P31INT_MASK 0x2 |
Definition at line 243 of file evmu_sfr.h.
| #define EVMU_SFR_P3INT_P31INT_POS 1 |
Definition at line 242 of file evmu_sfr.h.
| #define EVMU_SFR_P3INT_P32INT_MASK 0x4 |
Definition at line 241 of file evmu_sfr.h.
| #define EVMU_SFR_P3INT_P32INT_POS 2 |
Definition at line 240 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P70_MASK 0x1 |
Definition at line 261 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P70_POS 0 |
Definition at line 260 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P71_MASK 0x2 |
Definition at line 259 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P71_POS 1 |
Definition at line 258 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P72_MASK 0x4 |
Definition at line 257 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P72_POS 2 |
Definition at line 256 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P73_MASK 0x8 |
Definition at line 255 of file evmu_sfr.h.
| #define EVMU_SFR_P7_P73_POS 3 |
Definition at line 254 of file evmu_sfr.h.
| #define EVMU_SFR_PCON_HALT_MASK 0x1 |
Definition at line 35 of file evmu_sfr.h.
| #define EVMU_SFR_PCON_HALT_POS 0 |
Definition at line 34 of file evmu_sfr.h.
| #define EVMU_SFR_PCON_HOLD_MASK 0x2 |
Definition at line 33 of file evmu_sfr.h.
| #define EVMU_SFR_PCON_HOLD_POS 1 |
Definition at line 32 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_AC_MASK 0x40 |
Definition at line 19 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_AC_POS 6 |
Definition at line 18 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_CY_MASK 0x80 |
Definition at line 17 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_CY_POS 7 |
Definition at line 16 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_IRBK0_MASK 0x8 |
Definition at line 23 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_IRBK0_POS 3 |
Definition at line 22 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_IRBK1_MASK 0x10 |
Definition at line 21 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_IRBK1_POS 4 |
Definition at line 20 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_OV_MASK 0x4 |
Definition at line 25 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_OV_POS 2 |
Definition at line 24 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_P_MASK 0x1 |
Definition at line 29 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_P_POS 0 |
Definition at line 28 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_RAMBK0_MASK 0x2 |
Definition at line 27 of file evmu_sfr.h.
| #define EVMU_SFR_PSW_RAMBK0_POS 1 |
Definition at line 26 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_CTRL_MASK 0x8 |
Definition at line 147 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_CTRL_POS 3 |
Definition at line 146 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_END_MASK 0x2 |
Definition at line 151 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_END_POS 1 |
Definition at line 150 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_IE_MASK 0x1 |
Definition at line 153 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_IE_POS 0 |
Definition at line 152 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_LEN_MASK 0x10 |
Definition at line 145 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_LEN_POS 4 |
Definition at line 144 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_MSB_MASK 0x4 |
Definition at line 149 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_MSB_POS 2 |
Definition at line 148 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_OV_MASK 0x40 |
Definition at line 143 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_OV_POS 6 |
Definition at line 142 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_POL_MASK 0x80 |
Definition at line 141 of file evmu_sfr.h.
| #define EVMU_SFR_SCON0_POL_POS 7 |
Definition at line 140 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_CTRL_MASK 0x8 |
Definition at line 161 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_CTRL_POS 3 |
Definition at line 160 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_END_MASK 0x2 |
Definition at line 165 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_END_POS 1 |
Definition at line 164 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_IE_MASK 0x1 |
Definition at line 167 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_IE_POS 0 |
Definition at line 166 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_LEN_MASK 0x10 |
Definition at line 159 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_LEN_POS 4 |
Definition at line 158 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_MSB_MASK 0x4 |
Definition at line 163 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_MSB_POS 2 |
Definition at line 162 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_OV_MASK 0x40 |
Definition at line 157 of file evmu_sfr.h.
| #define EVMU_SFR_SCON1_OV_POS 6 |
Definition at line 156 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0HOVF_MASK 0x8 |
Definition at line 71 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0HOVF_POS 3 |
Definition at line 70 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0HRUN_MASK 0x80 |
Definition at line 79 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0HRUN_POS 7 |
Definition at line 78 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0LEXT_MASK 0x10 |
Definition at line 73 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0LEXT_POS 4 |
Definition at line 72 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0LONG_MASK 0x20 |
Definition at line 75 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0LONG_POS 5 |
Definition at line 74 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0LRUN_MASK 0x40 |
Definition at line 77 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_P0LRUN_POS 6 |
Definition at line 76 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_T0HIE_MASK 0x4 |
Definition at line 69 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_T0HIE_POS 2 |
Definition at line 68 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_T0LIE_MASK 0x1 |
Definition at line 65 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_T0LIE_POS 0 |
Definition at line 64 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_T0LOVF_MASK 0x2 |
Definition at line 67 of file evmu_sfr.h.
| #define EVMU_SFR_T0CNT_T0LOVF_POS 1 |
Definition at line 66 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_ELDT1C_MASK 0x10 |
Definition at line 115 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_ELDT1C_POS 4 |
Definition at line 114 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1HIE_MASK 0x4 |
Definition at line 119 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1HIE_POS 2 |
Definition at line 118 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1HOVF_MASK 0x8 |
Definition at line 117 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1HOVF_POS 3 |
Definition at line 116 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1HRUN_MASK 0x80 |
Definition at line 109 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1HRUN_POS 7 |
Definition at line 108 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LIE_MASK 0x1 |
Definition at line 123 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LIE_POS 0 |
Definition at line 122 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LONG_MASK 0x20 |
Definition at line 113 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LONG_POS 5 |
Definition at line 112 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LOVF_MASK 0x2 |
Definition at line 121 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LOVF_POS 1 |
Definition at line 120 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LRUN_MASK 0x40 |
Definition at line 111 of file evmu_sfr.h.
| #define EVMU_SFR_T1CNT_T1LRUN_POS 6 |
Definition at line 110 of file evmu_sfr.h.
| #define EVMU_SFR_VCCR_VCCR6_MASK 0x40 |
Definition at line 137 of file evmu_sfr.h.
| #define EVMU_SFR_VCCR_VCCR6_POS 6 |
Definition at line 136 of file evmu_sfr.h.
| #define EVMU_SFR_VCCR_VCCR7_MASK 0x80 |
Definition at line 135 of file evmu_sfr.h.
| #define EVMU_SFR_VCCR_VCCR7_POS 7 |
Definition at line 134 of file evmu_sfr.h.
| #define EVMU_SFR_VSEL_ASEL_MASK 0x1 |
Definition at line 265 of file evmu_sfr.h.
| #define EVMU_SFR_VSEL_ASEL_POS 0 |
Definition at line 264 of file evmu_sfr.h.
| #define EVMU_SFR_VSEL_INCE_MASK 0x10 |
Definition at line 269 of file evmu_sfr.h.
| #define EVMU_SFR_VSEL_INCE_POS 4 |
Definition at line 268 of file evmu_sfr.h.
| #define EVMU_SFR_VSEL_SIOSEL_MASK 0x2 |
Definition at line 267 of file evmu_sfr.h.
| #define EVMU_SFR_VSEL_SIOSEL_POS 1 |
Definition at line 266 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_CLOCK_MASK 0x4 |
Definition at line 293 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_CLOCK_POS 2 |
Definition at line 292 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_FILE_MASK 0x40 |
Definition at line 289 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_FILE_POS 6 |
Definition at line 288 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_FLASH_MASK 0x1 |
Definition at line 295 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_FLASH_POS 0 |
Definition at line 294 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_GAME_MASK 0x10 |
Definition at line 291 of file evmu_sfr.h.
| #define EVMU_SFR_XRAM_ICN_GAME_POS 4 |
Definition at line 290 of file evmu_sfr.h.
1.9.8