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libElysianVMU 1.6.0
Full-featured, accurate, cross-platform library emulating the Dreamcast's Visual Memory Unit
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libElysianVMU 1.6.0
Full-featured, accurate, cross-platform library emulating the Dreamcast's Visual Memory Unit
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Special function register locations and descriptions.
These are registers which are reserved by the SoC and its peripherals, which typically have special usages and properties.
| #define EVMU_ADDRESS_SFR_ACC 0x100 |
| #define EVMU_ADDRESS_SFR_B 0x102 |
#include <evmu_address_space.h>
B Register (general purpose)
Definition at line 144 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_BTCR 0x17f |
#include <evmu_address_space.h>
Base Time Control register.
Definition at line 257 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_C 0x103 |
#include <evmu_address_space.h>
C Register (general purpose)
Definition at line 145 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_CNR 0x123 |
#include <evmu_address_space.h>
Character Number register.
Definition at line 179 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_EXT 0x10d |
#include <evmu_address_space.h>
External Memory control - Whether program is read from ROM (BIOS) or FLASH (GAME)
Definition at line 153 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_FPR 0x154 |
#include <evmu_address_space.h>
(READ: all 1s) Flash Program Register: Used by LDF and STF flash instructions (in BIOS)
Definition at line 209 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_I01CR 0x15d |
#include <evmu_address_space.h>
External Interrupt 0, 1 Control.
Definition at line 214 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_I23CR 0x15e |
#include <evmu_address_space.h>
External Interrupt 2, 3 Control.
Definition at line 215 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_IE 0x108 |
#include <evmu_address_space.h>
Interrupt Enable control.
Definition at line 150 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_IP 0x109 |
#include <evmu_address_space.h>
Interrupt Priority Ranking control.
Definition at line 151 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_ISL 0x15f |
#include <evmu_address_space.h>
Input Signal Selection register.
Definition at line 216 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_MCR 0x120 |
#include <evmu_address_space.h>
Mode Control register.
Definition at line 176 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_MPLERST 0x162 |
#include <evmu_address_space.h>
Set and clear to reset Maple BUS.
Definition at line 220 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_MPLESTA 0x161 |
#include <evmu_address_space.h>
"UNDOC [ - | UNK (if set causes bus to be reinited) | ERR3 | ERR2 | - | IRQREQ (cleared by handler) | ERR1 | TXDONE (Set when tx done) ] (errs s\et if RXed packet was bad)"}
Definition at line 219 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_MPLESW 0x160 |
#include <evmu_address_space.h>
"UNDOC [ - | - | - | LASTPKT (Set if packet is last) | - | HW_ENA (is hw on?) | TX (TX normal packet) | TXS (tx starting packet) ]"
Definition at line 218 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_OCR 0x10e |
#include <evmu_address_space.h>
Oscillation Control Register (32kHz/600kHz/6MHz)
Definition at line 154 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_P1 0x144 |
| #define EVMU_ADDRESS_SFR_P1DDR 0x145 |
#include <evmu_address_space.h>
Port 1 Data Direction register.
Definition at line 196 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_P1FCR 0x146 |
#include <evmu_address_space.h>
Port 1 Function Control register.
Definition at line 197 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_P3 0x14c |
| #define EVMU_ADDRESS_SFR_P3DDR 0x14d |
#include <evmu_address_space.h>
Port 3 Data Direction register.
Definition at line 203 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_P3INT 0x14e |
#include <evmu_address_space.h>
Port 3 Interrupt Control register.
Definition at line 204 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_P7 0x15c |
| #define EVMU_ADDRESS_SFR_PCON 0x107 |
#include <evmu_address_space.h>
Power Control register.
Definition at line 149 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_PSW 0x101 |
#include <evmu_address_space.h>
Processor Status Word.
Definition at line 143 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_SBR 0x132 |
#include <evmu_address_space.h>
SIO Baud Rate Generator register.
Definition at line 188 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_SBUF0 0x131 |
| #define EVMU_ADDRESS_SFR_SBUF1 0x135 |
| #define EVMU_ADDRESS_SFR_SCON0 0x130 |
#include <evmu_address_space.h>
SIO0 Control register.
Definition at line 186 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_SCON1 0x134 |
#include <evmu_address_space.h>
SI01 Control register.
Definition at line 191 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_SP 0x106 |
| #define EVMU_ADDRESS_SFR_STAD 0x122 |
#include <evmu_address_space.h>
Start Address register.
Definition at line 178 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T0CNT 0x110 |
#include <evmu_address_space.h>
Timer 0 control.
Definition at line 157 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T0H 0x114 |
#include <evmu_address_space.h>
Timer 0 High Byte.
Definition at line 161 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T0HR 0x115 |
#include <evmu_address_space.h>
Timer 0 High Byte Reload register.
Definition at line 162 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T0L 0x112 |
#include <evmu_address_space.h>
Timer 0 Low Byte.
Definition at line 159 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T0LR 0x113 |
#include <evmu_address_space.h>
Timer 0 Low Byte Reload register.
Definition at line 160 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T0PRR 0x111 |
#include <evmu_address_space.h>
Timer 0 Prescalar Data register.
Definition at line 158 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T1CNT 0x118 |
#include <evmu_address_space.h>
Timer 1 control.
Definition at line 166 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T1H 0x11d |
#include <evmu_address_space.h>
Timer 1 High (Read-only)
Definition at line 172 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T1HC 0x11c |
#include <evmu_address_space.h>
Timer 1 High Compare Data register.
Definition at line 171 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T1HR 0x11d |
#include <evmu_address_space.h>
Timer 1 High Reload Register (Write-only)
Definition at line 173 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T1L 0x11b |
#include <evmu_address_space.h>
Timer 1 Low (Read-only)
Definition at line 169 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T1LC 0x11a |
#include <evmu_address_space.h>
Timer 1 Low Compare Data register.
Definition at line 168 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_T1LR 0x11b |
#include <evmu_address_space.h>
Timer 1 Low Reload register (Write-only)
Definition at line 170 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_TDR 0x124 |
#include <evmu_address_space.h>
Time Division register.
Definition at line 180 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_TRH 0x105 |
#include <evmu_address_space.h>
Table Reference (high byte)
Definition at line 147 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_TRL 0x104 |
#include <evmu_address_space.h>
Table Reference (low byte)
Definition at line 146 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_VCCR 0x127 |
#include <evmu_address_space.h>
LCD Contrast Control register.
Definition at line 183 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_VLREG 0x167 |
#include <evmu_address_space.h>
Length registration, # of maple words to send on BUS.
Definition at line 247 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_VRMAD1 0x164 |
#include <evmu_address_space.h>
Work RAM Access Address 1.
Definition at line 244 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_VRMAD2 0x165 |
#include <evmu_address_space.h>
Work RAM Access Address 2.
Definition at line 245 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_VSEL 0x163 |
#include <evmu_address_space.h>
VMS Control register.
Definition at line 243 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_VTRBF 0x166 |
#include <evmu_address_space.h>
Send/Receive Buffer.
Definition at line 246 of file evmu_address_space.h.
| #define EVMU_ADDRESS_SFR_XBNK 0x125 |
#include <evmu_address_space.h>
Bank Address register.
Definition at line 181 of file evmu_address_space.h.
1.9.8