Macros
#define	EVMU_ADDRESS_SEGMENT_RAM_BASE 0x00

#define	EVMU_ADDRESS_SEGMENT_RAM_END 0xff

#define	EVMU_ADDRESS_SEGMENT_RAM_SIZE 256

#define	EVMU_ADDRESS_SEGMENT_RAM_BANKS 2

#define	EVMU_RAM_OFFSET(a) (a - EVMU_ADDRESS_SEGMENT_RAM_BASE)

#define	EVMU_RAM_ADDRESS(o) (EVMU_ADDRESS_SEGMENT_RAM_BASE + o)

#define	EVMU_ADDRESS_SEGMENT_STACK_BASE 0x80

#define	EVMU_ADDRESS_SEGMENT_STACK_END 0xff

#define	EVMU_ADDRESS_SEGMENT_STACK_SIZE 128

#define	EVMU_ADDRESS_SEGMENT_STACK_BANKS 1

#define	EVMU_STACK_OFFSET(a) (a - EVMU_ADDRESS_SEGMENT_STACK_BASE)

#define	EVMU_STACK_ADDRESS(o) (EVMU_ADDRESS_SEGMENT_STACK_BEGIN + o)

#define	EVMU_ADDRESS_SEGMENT_SFR_BASE 0x100

#define	EVMU_ADDRESS_SEGMENT_SFR_END 0x17f

#define	EVMU_ADDRESS_SEGMENT_SFR_SIZE 128

#define	EVMU_ADDRESS_SEGMENT_SFR_BANKS 1

#define	EVMU_SFR_OFFSET(a) (a - EVMU_ADDRESS_SEGMENT_SFR_BASE)

#define	EVMU_SFR_ADDRESS(o) (EVMU_ADDRESS_SEGMENT_SFR_BEGIN + o)

#define	EVMU_XRAM_ROW_BYTES 6

#define	EVMU_XRAM_ROW_COUNT 16

#define	EVMU_ADDRESS_SEGMENT_XRAM_BASE 0x180

#define	EVMU_ADDRESS_SEGMENT_XRAM_END 0x1fb

#define	EVMU_ADDRESS_SEGMENT_XRAM_SIZE 0x80

#define	EVMU_ADDRESS_SEGMENT_XRAM_BANKS 3

#define	EVMU_XRAM_OFFSET(a) (a - EVMU_ADDRESS_SEGMENT_XRAM_BASE)

#define	EVMU_XRAM_ADDRESS(o) (EVMU_ADDRESS_SEGMENT_XRAM_BASE + o)

#define	EVMU_ADDRESS_SYSTEM_YEAR_MSB_BCD 0x10

#define	EVMU_ADDRESS_SYSTEM_YEAR_LSB_BCD 0x11

#define	EVMU_ADDRESS_SYSTEM_MONTH_BCD 0x12

#define	EVMU_ADDRESS_SYSTEM_DAY_BCD 0x13

#define	EVMU_ADDRESS_SYSTEM_HOUR_BCD 0x14

#define	EVMU_ADDRESS_SYSTEM_MINUTE_BCD 0x15

#define	EVMU_ADDRESS_SYSTEM_SEC_BCD 0x16

#define	EVMU_ADDRESS_SYSTEM_YEAR_MSB 0x17

#define	EVMU_ADDRESS_SYSTEM_YEAR_LSB 0x18

#define	EVMU_ADDRESS_SYSTEM_MONTH 0x19

#define	EVMU_ADDRESS_SYSTEM_DAY 0x1a

#define	EVMU_ADDRESS_SYSTEM_HOUR 0x1b

#define	EVMU_ADDRESS_SYSTEM_MINUTE 0x1c

#define	EVMU_ADDRESS_SYSTEM_SEC 0x1d

#define	EVMU_ADDRESS_SYSTEM_HALF_SEC 0x1e

#define	EVMU_ADDRESS_SYSTEM_LEAP_YEAR 0x1f

#define	EVMU_ADDRESS_SYSTEM_MODE 0x30

#define	EVMU_ADDRESS_SYSTEM_DATE_SET 0x31

#define	EVMU_ADDRESS_SYSTEM_QUART_YEAR_MSB 0x50

#define	EVMU_ADDRESS_SYSTEM_QUART_YEAR_LSB 0x51

#define	EVMU_ADDRESS_SYSTEM_CURSOR_POS_COL 0x60

#define	EVMU_ADDRESS_SYSTEM_CURSOR_POS_ROW 0x61

#define	EVMU_ADDRESS_SYSTEM_GAME_LAST_BLK 0x6d

#define	EVMU_ADDRESS_SYSTEM_BATTERY_CHECK 0x6e

#define	EVMU_ADDRESS_SYSTEM_STACK_BASE 0x80

#define	EVMU_ADDRESS_SYSTEM_STACK_END 0xff

#define	EVMU_ADDRESS_USER_FMBANK 0x7d

#define	EVMU_ADDRESS_USER_FMADD_H 0x7e

#define	EVMU_ADDRESS_USER_FMADD_L 0x7f

#define	EVMU_ADDRESS_USER_FM_RET_BASE 0x80

#define	EVMU_ADDRESS_USER_FM_RET_SIZE 128

#define	EVMU_ADDRESS_USER_FM_RET_END 0xff

#define	EVMU_ADDRESS_SFR_ACC 0x100

#define	EVMU_ADDRESS_SFR_PSW 0x101

#define	EVMU_ADDRESS_SFR_B 0x102

#define	EVMU_ADDRESS_SFR_C 0x103

#define	EVMU_ADDRESS_SFR_TRL 0x104

#define	EVMU_ADDRESS_SFR_TRH 0x105

#define	EVMU_ADDRESS_SFR_SP 0x106

#define	EVMU_ADDRESS_SFR_PCON 0x107

#define	EVMU_ADDRESS_SFR_IE 0x108

#define	EVMU_ADDRESS_SFR_IP 0x109

#define	EVMU_ADDRESS_SFR_EXT 0x10d

#define	EVMU_ADDRESS_SFR_OCR 0x10e

#define	EVMU_ADDRESS_SFR_T0CNT 0x110

#define	EVMU_ADDRESS_SFR_T0PRR 0x111

#define	EVMU_ADDRESS_SFR_T0L 0x112

#define	EVMU_ADDRESS_SFR_T0LR 0x113

#define	EVMU_ADDRESS_SFR_T0H 0x114

#define	EVMU_ADDRESS_SFR_T0HR 0x115

#define	EVMU_ADDRESS_SFR_T1CNT 0x118

#define	EVMU_ADDRESS_SFR_T1LC 0x11a

#define	EVMU_ADDRESS_SFR_T1L 0x11b

#define	EVMU_ADDRESS_SFR_T1LR 0x11b

#define	EVMU_ADDRESS_SFR_T1HC 0x11c

#define	EVMU_ADDRESS_SFR_T1H 0x11d

#define	EVMU_ADDRESS_SFR_T1HR 0x11d

#define	EVMU_ADDRESS_SFR_MCR 0x120

#define	EVMU_ADDRESS_SFR_STAD 0x122

#define	EVMU_ADDRESS_SFR_CNR 0x123

#define	EVMU_ADDRESS_SFR_TDR 0x124

#define	EVMU_ADDRESS_SFR_XBNK 0x125

#define	EVMU_ADDRESS_SFR_VCCR 0x127

#define	EVMU_ADDRESS_SFR_SCON0 0x130

#define	EVMU_ADDRESS_SFR_SBUF0 0x131

#define	EVMU_ADDRESS_SFR_SBR 0x132

#define	EVMU_ADDRESS_SFR_SCON1 0x134

#define	EVMU_ADDRESS_SFR_SBUF1 0x135

#define	EVMU_ADDRESS_SFR_P1 0x144

#define	EVMU_ADDRESS_SFR_P1DDR 0x145

#define	EVMU_ADDRESS_SFR_P1FCR 0x146

#define	EVMU_ADDRESS_SFR_P3 0x14c

#define	EVMU_ADDRESS_SFR_P3DDR 0x14d

#define	EVMU_ADDRESS_SFR_P3INT 0x14e

#define	EVMU_ADDRESS_SFR_FPR 0x154

#define	EVMU_ADDRESS_SFR_P7 0x15c

#define	EVMU_ADDRESS_SFR_I01CR 0x15d

#define	EVMU_ADDRESS_SFR_I23CR 0x15e

#define	EVMU_ADDRESS_SFR_ISL 0x15f

#define	EVMU_ADDRESS_SFR_MPLESW 0x160

#define	EVMU_ADDRESS_SFR_MPLESTA 0x161

#define	EVMU_ADDRESS_SFR_MPLERST 0x162

#define	EVMU_ADDRESS_SFR_VSEL 0x163

#define	EVMU_ADDRESS_SFR_VRMAD1 0x164

#define	EVMU_ADDRESS_SFR_VRMAD2 0x165

#define	EVMU_ADDRESS_SFR_VTRBF 0x166

#define	EVMU_ADDRESS_SFR_VLREG 0x167

#define	EVMU_ADDRESS_SFR_BTCR 0x17f

#define	EVMU_ADDRESS_XRAM_BYTE(x, y) (EVMU_ADDRESS_SEGMENT_XRAM_BASE+(y*EVMU_XRAM_ROW_BYTES)+x)

#define	EVMU_ADDRESS_XRAM_ICN_FILE 0x181

#define	EVMU_ADDRESS_XRAM_ICN_GAME 0x182

#define	EVMU_ADDRESS_XRAM_ICN_CLOCK 0x183

#define	EVMU_ADDRESS_XRAM_ICN_FLASH 0x184

Detailed Description

Defines for all known memory regions and addresses.

See also: evmu_sfr.h

This single file serves as an amalgomation of years worth of research, scouring the internet, pouring over documents, and attepting to reverse engineer the VMU. It represents everything I know about every address compromising its main RAM address space.

Author: 2023 Falco Girgis

Copyright: MIT License

Definition in file evmu_address_space.h.

Macros

Detailed Description